Analog Devices Inc. ADRF5519 20W Receiver Front End

Analog Devices ADRF5519 20W Receiver Front End is a dual-channel, integrated RF, front-end multi-chip module designed for time-division duplexing (TDD) applications that operate from 2.3GHz to 2.8GHz. The ADRF5519 is configured in dual channels with a cascading two-stage low noise amplifier (LNA) and a high power silicon single-pole, double-throw (SPDT) switch.

In high gain mode, the cascaded two-stage LNA and switch offer a low noise figure (NF) of 1.0dB and a high gain of 35dB at 2.6GHz with an output third-order intercept point (OIP3) of 32dBm (typical). In low gain mode, one stage of the two-stage LNA is in bypass, providing 14dB of gain at a lower current of 36mA. In power-down mode, the LNAs are turned off and the device draws 12mA.

In transmit operation, RF inputs are connected to a termination pin (ANT-CHA or ANT-CHB connected to TERM-CHA or TERM-CHB), respectively. The switch provides a low insertion loss of 0.5dB and handles a long-term evolution (LTE) average power (9dB peak to average ratio (PAR)) of 43dBm for full lifetime operation. The Analog Devices ADRF5519 comes in a RoHS-compliant, compact, 6mm × 6mm, 40-lead LFCSP package.

Features

  • Integrated dual-channel RF front end
    • 2-stage LNA and high power silicon SPDT switch
    • On-chip bias and matching
    • Single-supply operation
  • High power handling at TCASE = 105°C
    • LTE average power (9dB PAR) full lifetime (43dBm)
  • Gain
    • 35dB typical at 2.6GHz high gain mode
    • 14dB typical at 2.6GHz low gain mode
  • Low noise figure
    • 1.0dB typical at 2.6GHz high gain mode
    • 1.0dB typical at 2.6GHz low gain mode
  • High isolation
    • RXOUT-CHA and RXOUT-CHB (45dB typical)
    • TERM-CHA and TERM-CHB (60dB typical)
  • 0.5dB typical at 2.6GHz low insertion loss
  • 32dBm typical high OIP3
  • Power-down mode and low gain mode
  • Low supply current
    • 110mA typical at 5V high gain mode
    • 36mA typical at 5V low gain mode
    • 12mA typical at 5V power-down mode
  • Positive logic control
  • 6mm × 6mm, 40-lead LFCSP package
  • Pin compatible with the ADRF5545A and ADRF5549 10W versions

Applications

  • Wireless infrastructure
  • TDD massive multiple input and multiple output and active antenna systems
  • TDD-based communication systems

Functional Block Diagram

Block Diagram - Analog Devices Inc. ADRF5519 20W Receiver Front End
Published: 2021-06-18 | Updated: 2022-03-11